The Make Utility



next up previous contents index
Next: Anatomy of a Up: UNIX TOOLS AND Previous: Running into the

The Make Utility

The make command invokes a very powerful utility for making or assembling programs from source codes and libraries. In spite of its power, make is quite easy to use since it's smart. It will compare the modification times of the source code files needed to create your program, and if some source has been modified in the time since its object was created, make will automatically recompile those source routines which have changed. Though make is smart, it can't read your mind. So instead, it reads the file makefile or Makefile in the current directory to find the rules for making a program. A simple makefile looks like this:
   


# Makefile for program kabs kabs: kabs.f The program kabs depends on kabs.f. TAB f77 -O -o kabs kabs.f Line is indented with aTAB.

Here the first line is simply a comment. The next states that the target program we want to make, kabs, depends on the file kabs.f. If the file kabs.f has been modified since the target kabs was created, then kabs will be rebuilt by executing the commands on the following lines. It is important to note that the command lines must be indented with a tab character. In the next example, the single command line says to recompile the program using f77. To make the program, issue the command make with a target name:

% make kabs   	Make the program kabs.   
    f77 -O -o kabs kabs.f   	The system compiles the program.   

In the preceding example, the program only depended on one file. Make becomes particularly useful when the program is made up of many files; for example:


# Makefile for program kabs kabs: kabs.o graf.o The program kabs depends on two files. f77 -O -o kabs kabs.o graf.o

This makefile states that the program kabs depends on two object files. No rule is stated for compiling the object files, so make uses its built-in rules. It will assume there is a C or Fortran source code in the present working directory and use it to make the object files; in this case it will look for kabs.f and graf.f or kabs.c and graf.c. Since kabs depends on the object files, make will check if they are current before making kabs.f. The file kabs.o implicitly depends on kabs.f, and so make will check the modification time of kabs.f. If it has changed since kabs.o was created, make will recompile the object file. It will then do the same for graf.o. After this, make will check the modification times of the object files and compare them to the target kabs. If either object file has been modified, make will run the command line which recompiles (links) kabs. The exact result of executing make depends on the state of the source. Here is a sample run:

% make kabs   	Issued from working directory.   
    f77 -c kabs.f   	Build kabs.o object file.   
    f77 -O -o kabs kabs.o graf.o   	Then build the target.   

The built-in rules for making object files look like these:


.c.o: Rule for making object files from C programs. $(CC) $(CFLAGS) -c $< .f.o: Rule for making object files from Fortran programs. $(FC) $(FFLAGS) -c $<

These are only two of several built-in rules. You may find these rules by issuing the command make -p or sometimes by looking in the /etc/make.cfg file. Notice that the rules use variables for the name of the compiler and for the options or flags passed to the compiler. There is also a special flag $< which stands for the name of the file. You may set and use the variables for the compilers and flags as well as creating your own variables.





next up previous contents index
Next: Anatomy of a Up: UNIX TOOLS AND Previous: Running into the